jevinskie/mips--
View on GitHub ↗ ★ 8 VHDL
A dual core MIPS subset CPU written in behavioral, synthesizable VHDL
5 mentions on Hacker News by 1 person: 0 stories, 5 comments · first 2013-01-27 · latest 2017-01-30
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…really pushed the LE limits on the FPGA and my patience during the very long synthesis time. [0]: https://github.com/jevinskie/mips--/tree/master/project4/sou... [1]: http://www.gaisler.com/doc/vhdl2proc.pdf
comment by jevinskie · 2017-01-30 · in Free Range VHDL – VHDL programming book available for free -
…surprised by how few times I've seen it used. [0]: http://www.gaisler.com/doc/vhdl2proc.pdf [1]: https://github.com/jevinskie/mips--/tree/master/project4/sou...
comment by jevinskie · 2014-08-04 · in Show HN: A 16-bit Forth machine written in VHDL -
This is the one I did during university. It implemented a subset of MIPS. https://github.com/jevinskie/mips--/tree/master/project4/sou... I would recommend anyone interested in VHDL to read this article about the programming style I used.…
comment by jevinskie · 2014-04-19 · in Introduction to MIPS assembly language (2007) -
…https://github.com/jevinskie/aes-over-pcie/tree/master/sourc... The MIPS project in two-process: https://github.com/jevinskie/mips--/tree/master/project4/sou... [0]: http://www.gaisler.com/doc/vhdl2proc.pdf
comment by jevinskie · 2014-04-19 · in VHDL Verification Course -
…smaller but I wonder how much delay it adds to the circuit. [edit] Here is my MIPS-- ALU in VHDL: https://github.com/jevinskie/mips--/blob/master/project4/sou... Quite simple, really. The hard part is the control lines and the cache!
comment by jevinskie · 2013-01-27 · in Inside the ALU of the 8085 microprocessor