ultraembedded/biriscv
View on GitHub ↗ ★ 1,332 Verilog
32-bit Superscalar RISC-V CPU
3 mentions on Hacker News by 2 people: 2 stories, 1 comment · first 2020-08-05 · latest 2021-07-20
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…language and bus interfaces. I've been looking at this one for high end (1.9 DMIPS/MHz!): https://github.com/ultraembedded/biriscv Google/lowRISC has this one: https://github.com/lowRISC/ibex I'm using picorv32 right now on Lattice ECP5-…
comment by jhallenworld · 2020-08-05 · in System on Chip wrapping the SERV RISC-V soft processor