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RISC-V Architecture Profiles

21 mentions on Hacker News by 13 people: 2 stories, 19 comments · first 2022-01-18 · latest 2025-03-30

Mentions per year 21 mentions · busiest year 2023 (9)
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  1. …platforms may permit reserved opcode space be used for non-conforming extensions. The RVA23 says: ( https://github.com/riscv/riscv-profiles/blob/main/src/rva23-... ) > Implementations are strongly recommended to raise illegal-instruction…
    comment by dzaima · 2025-03-30 · in Towards fearless SIMD, 7 years later
  2. …subset of RVA23, and any software targetting RVA22 should run fine on a CPU supporting RVA23. [1]: https://github.com/riscv/riscv-profiles/blob/main/src/profil... [2]: https://github.com/riscv/riscv-profiles/blob/main/src/rva-pr...
    comment by magicalhippo · 2024-10-23 · in RISC-V Announces Ratification of the RVA23 Profile
  3. …kits, so I don't see how there can be fragmentation in a market that does not yet even exist. [0] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-... [1] https://opensource.googleblog.com/2023/10/android-and-risc-v... (note:…
    comment by Vt71fcAqt7 · 2024-06-07 · in Instruction Sets Should Be Free: The Case for RISC-V [pdf] (2014)
  4. …the undefined behaviour problem, or at least it'll make undefined instructions actually trap. https://github.com/riscv/riscv-profiles/blob/main/rva23-prof...
    comment by rwmj · 2024-04-28 · in How to improve the RISC-V specification
  5. …As well as the BSDs. Specifically, they currently target RVA20, and thus also support RVA22. 0. https://github.com/riscv/riscv-profiles/releases
    comment by snvzz · 2023-11-03 · in Raspberry Pi receives strategic investment from Arm
  6. …is likely to be their baseline for RISC-V - based Android handsets in the future.[2] [1] < https://github.com/riscv/riscv-profiles/blob/main/rva23-prof... > [2] < https://youtu.be/xLwdUn3DQp8?t=990 >
    comment by Findecanor · 2023-10-17 · in SiFive Rolls Out RISC-V Cores Aimed at Generative AI and ML
  7. …introduce a element wise popcount instruction [3]. [0] https://github.com/riscv/riscv-bitmanip [1] https://github.com/riscv/riscv-profiles [2] https://github.com/riscv/riscv-v-spec [3] https://github.com/riscv/riscv-crypto/blob/master/doc/v…
    comment by camel-cdr · 2023-08-13 · in Popcount CPU instruction (2019)
  8. …magic on top, but the base will be one of the latest profiles, which are backwards compatible. [1] https://github.com/riscv/riscv-profiles/blob/main/profiles.a...
    comment by camel-cdr · 2023-08-04 · in Leading Semiconductor Industry Players Join Forces to Accelerate RISC-V
  9. Not since RISC-V Profiles[0]. 0. https://github.com/riscv/riscv-profiles/releases
    comment by snvzz · 2023-07-24 · in Debian riscv64
  10. The Profiles spec which includes RVA22 was finally ratified[0] last week. 0. https://github.com/riscv/riscv-profiles/releases/tag/v1.0
    comment by snvzz · 2023-04-08 · in RISC-V Profiles: Defining sets of extensions for coherent ecosystems
  11. …that "application processors" (I guess CPUs that want to run precompiled code) should support: https://github.com/riscv/riscv-profiles/blob/main/profiles.a... The 22 indicates the year.
    comment by IshKebab · 2023-03-04 · in RISC-V Business: Testing StarFive's VisionFive 2 SBC
  12. Ah, you're right: https://github.com/riscv/riscv-profiles/blob/main/profiles.a... That's good to see. (Boy, it's really hard to find info about RISC-V profiles on Google. It just seems to ignore all the letters and numbers.)
    comment by gary_0 · 2023-01-14 · in TinyEMU – x86 and RISC-V emulator, small and simple while being complete
  13. …Z* extensions. Maybe lscpu output would be more detailed? 0. https://www.sifive.com/cores/u74-mc 1. https://github.com/riscv/riscv-profiles/blob/main/profiles.a...
    comment by snvzz · 2023-01-12 · in RISC-V SBC VisionFive 2 Officially Shipped
  14. …stick to the spec which is all that matters for end users as it guarantees a consistent experience. https://github.com/riscv/riscv-profiles/blob/main/profiles.a...
    comment by hajile · 2022-11-17 · in RISC-V: The Last ISA?
  15. …are finished, RVA24S64 will likely be around and make a couple optional extensions required. https://github.com/riscv/riscv-profiles/blob/main/profiles.a... Ultra-tiny cores using the still not finalized RV32E may exist in the future, but…
    comment by hajile · 2022-11-16 · in RISC-V: The Last ISA?
  16. …section[0] addressing the difference. The actual platform specification can be found here[1]. [0]: https://github.com/riscv/riscv-profiles/blob/main/profiles.a... [1]: https://github.com/riscv/riscv-platform-specs/blob/main/risc...
    comment by snvzz · 2022-03-17 · in The first RISC-V portable computer is now available
  17. For those not familiar of RVA22 documentation of it is here: https://github.com/riscv/riscv-profiles/blob/main/profiles.a... Essentially it is shortform for standardising a set of optional instruction sets into a bundle. RV for RISC-V, A…
    comment by Pet_Ant · 2022-03-16 · in The first RISC-V portable computer is now available
  18. Had to look up RVA22: https://github.com/riscv/riscv-profiles/blob/main/profiles.a...
    comment by __s · 2022-02-13 · in A Big Week for RISC-V
  19. RVA22 Profile: https://github.com/riscv/riscv-profiles/blob/main/profiles.a... Zba and Zbb are both mandatory extensions. Zbc, Zbkb, Zbkc, Zbkx are all supported extensions. Zba and Zbb contain most useful bitmanip instructions. For…
    comment by znwu · 2022-01-18 · in The RISC-V Experience