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nickmqb/wyre

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Hardware definition language that compiles to Verilog

5 mentions on Hacker News by 3 people: 1 story, 4 comments · first 2020-09-26 · latest 2021-02-19

Mentions per year 5 mentions · busiest year 2020 (4)
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  1. …ergonomics instead. I'm currently making a basic Minecraft clone for the Lattice iCE40 with it. [0] https://github.com/nickmqb/wyre
    comment by nickmqb · 2021-02-19 · in Designing a RISC-V CPU, Part 1: Learning hardware design as a software engineer
  2. Take a look at the examples dir on github: https://github.com/nickmqb/wyre/tree/master/examples Then look at the "output" subdirectory and you'll find a verilog generated file for each example of the parent directory.
    comment by ithkuil · 2020-11-22 · in I'm building a Minecraft clone in hardware, on a tiny FPGA with 143kb of RAM
  3. …seems pretty interesting. Its cuts quite a bit of the verbosity of Verilog. I'll give it a try. [1] https://github.com/nickmqb/wyre
    comment by guiambros · 2020-11-21 · in I'm building a Minecraft clone in hardware, on a tiny FPGA with 143kb of RAM
  4. …with existing hardware development toolchains. The language is open source and can be found here: https://github.com/nickmqb/wyre
    comment by nickmqb · 2020-11-21 · in I'm building a Minecraft clone in hardware, on a tiny FPGA with 143kb of RAM
  5. ▲ 4
    Show HN: Wyre, a hardware definition language that compiles to Verilog
    story by nickmqb · 2020-09-26 · 0 comments