lowRISC/opentitan
View on GitHub ↗ ★ 3,725 SystemVerilog
OpenTitan: Open source silicon root of trust
15 mentions on Hacker News by 7 people: 2 stories, 13 comments · first 2020-05-21 · latest 2025-06-29
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The hardware IP is Apache-licensed, https://github.com/lowRISC/opentitan . Ideally, it will be possible to buy commercial hardware that incorporates an open silicon RoT, perform a reproducible build of open firmware for the device RoT,…
comment by transpute · 2025-06-29 · in ZeroRISC Gets $10M Funding, Says Open-Source Silicon Security Inevitable -
…not just an FPGA) whilst remaining full open source hardware (you can see all the RTL here: https://github.com/lowRISC/opentitan/tree/earlgrey_1.0.0 available under an Apache 2.0 license).
comment by gchadwick · 2025-02-07 · in TKey – Security for the New World -
…circuit you want? As a small illustrative example here's a commit for a timing fix I did recently: https://github.com/lowRISC/opentitan/commit/1fc57d2c550f2027... . It's for a specialised CPU for asymmetric crypto. It has a call stack…
comment by gchadwick · 2023-12-27 · in Chisel: A Modern Hardware Design Language -
…for similar foundational technologies in the hardware world). Our major project focus is OpenTitan: https://github.com/lowRISC/opentitan it’s a silicon root of trust being built and funded by a collaboration of major companies, such as…
comment by gchadwick · 2023-08-01 · in Ask HN: Who is hiring? (August 2023) -
Worth pointing out OpenTitan (which I work on) here: www.opentitan.org, www.github.com/lowrisc/opentitan It's an open silicon root of trust. All the RTL (systemverilog code that describes the hardware), DV (design verification, which is…
comment by gchadwick · 2023-07-11 · in Roots of trust are difficult -
…for similar foundational technologies in the hardware world). Our major project focus is OpenTitan: https://github.com/lowRISC/opentitan it’s a silicon root of trust being built and funded by a collaboration of major companies, such as…
comment by gchadwick · 2023-07-03 · in Ask HN: Who is hiring? (July 2023) -
We're aiming to push things in the other direction with OpenTitan: https://github.com/lowRISC/opentitan/ It's an Open Silicon root of trust, all RTL (the actual hardware design in SystemVerilog), firmware, documentation and verification…
comment by gchadwick · 2023-06-23 · in Putting out the hardware dumpster fire -
…We're at an advanced stage of development and being open you can take a look at our work right now https://github.com/lowRISC/OpenTitan our nightly regression dashboards demonstrate the project's maturity…
comment by gchadwick · 2022-12-20 · in Towards a More Open Secure Element Chip -
We've changed the URL to that from https://github.com/lowRISC/opentitan , as well as the title. The submitted title ("Google, Western Digital, Seagate quietly devolping an open source root of trust") broke the site guidelines badly,…
comment by dang · 2022-04-23 · in OpenTitan: Open source silicon root of trust -
…plus significant open hardware projects on-going. I shall take the opportunity to plug OpenTitan: https://github.com/lowRISC/opentitan It's an open source root of trust being developed collaboratively by multiple companies such as lowRISC…
comment by gchadwick · 2022-04-23 · in Making open source hardware design a reality -
…[2] https://github.com/google/skywater-pdk [3] https://github.com/siliconcompiler/zerosoc [4] https://github.com/lowrisc/opentitan
comment by jimmyswimmy · 2021-12-07 · in Compiling code into silicon -
…uses, implementation of a FIDO2 universal 2-factor security key[2]. [1] https://opentitan.org/ [2] https://github.com/lowRISC/opentitan/pull/1125/files#diff-6d...
comment by rektide · 2020-10-19 · in Face ID and Touch ID for the Web -
…it's suitable for taping-out into a real system but still quite simple to understand. OpenTitan ( https://github.com/lowRISC/opentitan ) is a notable project we're also working on that uses it, it's an open source root of trust and will…
comment by gchadwick · 2020-05-21 · in VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA