jeceljr/digitalCPUzoo
View on GitHub ↗ ★ 5 Verilog
several processor designs using the Digital simulator
3 mentions on Hacker News by 1 person: 0 stories, 3 comments · first 2025-01-23 · latest 2026-06-18
20082026
-
…[3]. [1] https://github.com/jeceljr/SBN/blob/master/sbn.pdf [2] https://github.com/cpldcpu/MCPU [3] https://github.com/jeceljr/digitalCPUzoo/tree/main/MCPU
comment by jecel · 2026-06-18 · in Show HN: We built an 8-bit CPU as 2nd year EE students -
…that is compatible with RISC-V at the assembly language level but has its own binary encoding: https://github.com/jeceljr/digitalCPUzoo/tree/main/drv16 It is meant as a helper processor in larger FPGA projects. These need less than 64KB of…
comment by jecel · 2025-02-05 · in I coded a Pascal compiler for transputer as a teen in 1993 -
…to 16 bits makes it practical, if still awkward. I implemented the 2048 game on that, for example. https://github.com/jeceljr/digitalCPUzoo/tree/main/MCPU
comment by jecel · 2025-01-23 · in Simple CPU Design