jbangert/trapcc on Hacker News

…fault that creates another lookup that... Leads to x86 page table MMU magic being turing complete: https://github.com/jbangert/trapcc And the simplest thing you can do on such a system is just to loop indefinitely, thus creating a simple…

comment by thyristan · 2026-08-08 · in Assembly Hall of Shame

…the data format is Turing-complete not only in its instructions, but in the page table! See https://github.com/jbangert/trapcc If anything, when you build a system and it starts to get complex, you have to go out of your way to ensure it's…

comment by quotemstr · 2026-07-09 · in Unicode's transliteration rules are Turing-complete

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Trapcc – computing with traps

story by pabs3 · 2024-03-28 · 1 comment

A variation of this has been done using Intel MMU fault handling. Behold: https://github.com/jbangert/trapcc This is a proof by construction that the Intel MMU's fault handling mechanism is Turing complete. We have constructed an assembler…

comment by FreakLegion · 2023-10-07 · in Subtraction is functionally complete

…tps://en.wikipedia.org/wiki/One-instruction_set_computer ) project or x86 MMU being turing complete ( https://github.com/jbangert/trapcc ). Both are clearly just interesting hacks (which may have some interesting implications about…

comment by ithkuil · 2023-10-06 · in Building Processors from the Ground Up

…http://www.cs.jhu.edu/~sam/ccs243-mason.pdf [3] http://www.cl.cam.ac.uk/~sd601/papers/mov.pdf [4] https://github.com/jbangert/trapcc

comment by eesmith · 2023-01-03 · in x86 is Turing-complete with no registers (2014)

x86 is Turing-complete with no instructions, too: https://github.com/jbangert/trapcc

comment by saagarjha · 2023-01-03 · in x86 is Turing-complete with no registers (2014)

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Trapcc – Computing with Traps

story by pabs3 · 2022-09-27 · 0 comments

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x86's MMU Is Turing Complete

story by DyslexicAtheist · 2019-01-26 · 0 comments

Someone made a NISC compiler: https://github.com/jbangert/trapcc

comment by Legogris · 2019-01-24 · in Movfuscator – Single instruction C compiler

in a similar vein, here is an exmple program that runs using only x86 CPU faults. https://github.com/jbangert/trapcc

comment by dx87 · 2019-01-24 · in Movfuscator – Single instruction C compiler

…Here you go, computation via continuous MMU faults without actually completing any instructions: https://github.com/jbangert/trapcc https://www.youtube.com/watch?v=eSRcvrVs5ug

comment by burfog · 2019-01-24 · in Intel 80386, part 1: Introduction

The page table walking hardware on x86 is pretty distinct from the main core, and is Turing complete. https://github.com/jbangert/trapcc

comment by monocasa · 2018-11-09 · in How Many Computers Are in Your Computer?

You don't even need mov. X86 MMU fault handling mechanism is Turing complete. https://github.com/jbangert/trapcc

comment by sigjuice · 2016-12-31 · in X86 Assembly Guide

And for the minimalist, the zero-instruction C compiler https://github.com/jbangert/trapcc

comment by danjoc · 2016-08-27 · in Movfuscator – A single-instruction C compiler

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Trapcc – A zero-instruction C compiler

story by danjoc · 2016-08-27 · 0 comments

How about computing with 0 instructions? (aka Intel MMU's fault handling is Turing complete): https://github.com/jbangert/trapcc

comment by edwintorok · 2016-06-25 · in An emulator for a single-instruction (NOR) CPU

…is actually Turing-complete without even executing a single instruction. Page faulting is enough: https://github.com/jbangert/trapcc

comment by foobar2020 · 2015-08-07 · in Movfuscator: A single-instruction C compiler

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Computing with traps

story by varjag · 2015-06-29 · 10 comments

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Zero-Instruction Computing

story by varjag · 2015-06-27 · 0 comments

Who needs instructions? Page faults are Turing complete: https://github.com/jbangert/trapcc

comment by M2Ys4U · 2015-06-21 · in X86 mov is turing complete: mov-only compiler

(author here) https://github.com/jbangert/trapcc We did get a few hypervisor crashes and the Intel architecture has all sorts of subtle behaviour that is often not modelled properly. It would be good to see someone build on my work.

comment by jbangert · 2015-06-05 · in An X86 Design Flaw Allowing Universal Privilege Escalation

…setting up the page tables such that the MMU functions as a rudimentary one-instruction computer. https://github.com/jbangert/trapcc Real, asymptotically-efficient computations in CSS would require some kind of layer of indirection -- a…

comment by teraflop · 2015-05-20 · in Silon – Adders and Logic Gates in Pure CSS

Forget registers; modern x86 is turing-complete without any instructions : https://github.com/jbangert/trapcc

comment by stephencanon · 2014-02-12 · in x86 is Turing-complete with no registers

…Computation without ever incrementing the program counter. Link to the code by the same guys: https://github.com/jbangert/trapcc

comment by peterwaller · 2013-09-28 · in The Page-Fault Weird Machine: Lessons in Instruction-less Computation

…0 x86 instructions to run the computation. There's a video of it running available too [2]. [1] : https://github.com/jbangert/trapcc [2] : http://www.youtube.com/watch?v=eSRcvrVs5ug

comment by testbro · 2013-09-01 · in MOV is Turing Complete [pdf]

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Trapcc: Computation through Intel MMU's fault handling mechanism

story by throwaway2048 · 2013-08-14 · 0 comments

If you read through the slides @ https://github.com/jbangert/trapcc/blob/master/slides/PFLA-s... there is potential to bypass hardware memory protection. Very interesting.

comment by phyalow · 2013-02-22 · in X86 MMU fault handling is turing complete

The slides in the github repo ( https://github.com/jbangert/trapcc/blob/master/slides/PFLA-s... ) also have a few interesting points, like "No publicly available simulator implements this correctly" (how did they record the youtube video?)…

comment by 0x0 · 2013-02-22 · in X86 MMU fault handling is turing complete

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X86 MMU fault handling is turing complete

story by mman · 2013-02-22 · 39 comments