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XLS: Accelerated HW Synthesis

5 mentions on Hacker News by 5 people: 1 story, 4 comments · first 2020-09-02 · latest 2026-09-02

Mentions per year 5 mentions · busiest year 2020 (4)
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  1. ▲ 2
    XLS: Accelerated HW Synthesis by Google for ASIC/FPGA
    story by paaloeye · 2026-09-02 · 0 comments
  2. Thanks again for the detailed thought! We actually [developed more advanced bit slicing syntax]( https://github.com/google/xls/blob/1b6859dc384fe8fa39fb901af... ) since that example was written, you can do things like a standard slice…
    comment by learyg · 2020-09-02 · in XLS: Accelerated HW Synthesis
  3. Looks like the match arm difference is going away: https://github.com/google/xls/pull/127
    comment by muizelaar · 2020-09-02 · in XLS: Accelerated HW Synthesis
  4. I love their RISC-V implementation in 500 lines of code: https://github.com/google/xls/blob/main/xls/examples/riscv_s...
    comment by Connect12A22 · 2020-09-02 · in XLS: Accelerated HW Synthesis
  5. It looks really quite similar to Rust: https://github.com/google/xls/blob/main/xls/examples/dslx_in... Note that there are differences though: Seems no type inferrence, for .. in, different array syntax, match arms delimitered by ";"…
    comment by est31 · 2020-09-02 · in XLS: Accelerated HW Synthesis