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Glacial - microcoded RISC-V core designed for low FPGA resource utilization

3 mentions on Hacker News by 3 people: 1 story, 2 comments · first 2021-03-20 · latest 2023-01-12

Mentions per year 3 mentions · busiest year 2021 (2)
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  1. …your priority is not performance. Here are just two examples: https://github.com/gsmecher/minimax https://github.com/brouhaha/glacial
    comment by jecel · 2023-01-12 · in Compiled and interpreted languages: Two ways of saying tomato
  2. …doing is writing a RISC-V emulator that runs on what looks to be a fairly standard 8 bit CPU? [1] https://github.com/brouhaha/glacial/blob/master/ucode/ucode....
    comment by kiwidrew · 2021-03-20 · in Glacial – Microcoded RISC-V core designed for low FPGA resource utilization
  3. ▲ 78
    Glacial – Microcoded RISC-V core designed for low FPGA resource utilization
    story by peter_d_sherman · 2021-03-20 · 51 comments