ZipCPU/zipcpu
View on GitHub ↗ ★ 1,595 Verilog
A small, light weight, RISC CPU soft core
4 mentions on Hacker News by 4 people: 1 story, 3 comments · first 2018-10-04 · latest 2020-11-13
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…on my website (also listed in my profile). 0 - https://riscv.org/ 1 - https://www.sifive.com/ 2 - https://github.com/ZipCPU/zipcpu 3 - http://zipcpu.com/
comment by charlesdaniels · 2020-11-13 · in Your Computer Isn't Yours -
Found some info in the repo's issues about how much room ZipCPU takes on an FPGA: https://github.com/ZipCPU/zipcpu/issues/8 PDFs: https://github.com/ZipCPU/zipcpu/blob/master/doc/orconf.pdf https://github.com/ZipCPU/zipcpu/blob/master/doc/o…
comment by zackmorris · 2019-08-03 · in ZipCPU – A small, lightweight, RISC soft core in Verilog -
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ZipCPU – A small, lightweight, RISC soft core in Verilogstory by eatonphil · 2019-08-03 · 43 comments
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Where does it mention RISC-V? I'm curious to read it. I hit ctrl-F to search for RISC-V in https://github.com/ZipCPU/zipcpu/blob/master/doc/spec.pdf and only found a brief mention under "2.2.7: Operand B".
comment by scottlamb · 2018-10-04 · in About the ZipCPU