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YosysHQ/yosys

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Yosys Open SYnthesis Suite

8 mentions on Hacker News by 8 people: 0 stories, 8 comments · first 2019-03-20 · latest 2025-09-29

Mentions per year 8 mentions · busiest year 2019 (2)
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  1. …to use. It still uses TCL scripting (which I know is standard in EDA but it shouldn't be). https://github.com/YosysHQ/yosys?tab=readme-ov-file#getting-... I wish we had a modern easy-to-use solution.
    comment by IshKebab · 2025-09-29 · in Zero ASIC releases Wildebeest, the highest performance FPGA synthesis tool
  2. …yosys's excellent synthesis and analysis engines? Martin Povišer just did it! Thank you Martin. [1] https://github.com/YosysHQ/yosys [2] https://github.com/MikePopoloski/slang
    comment by fargle · 2024-09-07 · in Yosys and slang: A match made in heaven
  3. …be wired up out of TTL chips or made into an IC. [1] https://github.com/steveicarus/iverilog [2] https://github.com/YosysHQ/yosys
    comment by retrac · 2024-04-23 · in OpenCores: A-Z80 CPU
  4. …yosys is explicitly, manifestly, being used as a scripting harness - you literally have ScriptPass https://github.com/YosysHQ/yosys/blob/076c5ceb714bc8f20136a8... and it is indeed used extensively for all of the flows:…
    comment by mathisfun123 · 2023-09-27 · in Verilog to Routing
  5. Nice project. FYI, this is using the Yosys Verilog synthesizer for the real magic. https://github.com/YosysHQ/yosys
    comment by pdq · 2021-08-04 · in Verilog2Factorio: Web Demo
  6. …is hundreds to thousands of bytes in multiple configurations rather than a few dozen bits. [3] https://github.com/YosysHQ/yosys [4] https://symbiflow.github.io/ [5] https://github.com/m-labs/nmigen
    comment by ohazi · 2021-01-03 · in AMD Patent Reveals Hybrid CPU-FPGA Design That Could Be Enabled by Xilinx Tech
  7. …[2] Qucs https://github.com/Qucs/qucs [3] gEDA http://www.geda-project.org/ [4] Yosys https://github.com/YosysHQ/yosys [5] SymbiFlow https://symbiflow.github.io [6] The OpenROAD https://theopenroadproject.org [7] The OpenROAD…
    comment by xvilka · 2019-05-22 · in ARM memo tells staff to stop working with Huawei
  8. There is a link in https://github.com/YosysHQ/yosys/wiki/VHDL-frontend-efforts
    comment by teabee89 · 2019-03-20 · in Show HN: H2 Forth CPU