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Wren6991/Hazard3

View on GitHub ↗ ★ 1,130 Verilog

3-stage RV32IMACZb* processor with debug

17 mentions on Hacker News by 14 people: 1 story, 16 comments · first 2024-08-08 · latest 2026-08-15

Mentions per year 17 mentions · busiest year 2024 (8)
20082026
  1. …RP2350 µC [2]. See this article from Luke Wren (Wren6991) back when the RP2350 came out [3]. [1] https://github.com/Wren6991/Hazard3 [2] https://www.raspberrypi.com/products/rp2350/ [3] https://www.raspberrypi.com/news/risc-v-on-raspberry-p…
    comment by aurelian15 · 2026-08-15 · in RISC-V: They Should Have Known Better
  2. Indeed https://github.com/Wren6991/Hazard3
  3. It's an open source core design [0], so pretty open. [0] https://github.com/Wren6991/Hazard3
  4. …harnesses or general implementation patterns as well as better software support help other cores: https://github.com/Wren6991/Hazard3 For the SoCs I would expect to see an off-the-shelf Risc-V core (certainly no Hazard3 as the main CPU),…
  5. …on the open source RISC V spec. Hazard3 [0] on the other hand, is an open source core design. [0] https://github.com/Wren6991/Hazard3
  6. https://github.com/Wren6991/Hazard3 this one is well tested in real life and works well (it is the RV core in RP2350)
  7. …is why I consider them to be competitive despite the losses. The Hazard3 cores are open source: https://github.com/Wren6991/Hazard3 That said, not all RISC-V designs are open source, but some of the open source ones are performance…
  8. RP2350 (Raspberry Pi Pico 2) has two Hazard3 cores, which is open-source at: https://github.com/Wren6991/Hazard3
  9. …agreement does not solve this, because you may sign it without the legal capability to do so (...)" https://github.com/Wren6991/Hazard3/blob/stable/Contributing... (this is I believe the repo with design for riscv cores running on RPi Pico…
    comment by bialpio · 2025-01-25 · in Wild – A fast linker for Linux
  10. …of the better RISCV designs, in fact, implement a custom instr to do this, eg: BEXTM in Hazard3: https://github.com/Wren6991/Hazard3/blob/stable/doc/hazard3....
  11. …in the RP2350, you don't get your own core design taped out as an ASIC and then not show it off :p https://github.com/Wren6991/Hazard3
    comment by jsheard · 2024-08-15 · in RP2350 PicoDVI Preview
  12. See https://github.com/Wren6991/Hazard3/tree/stable/test for the test harnesses used. I wonder if they did release all they used there.
  13. Hazard3 pointer https://github.com/Wren6991/Hazard3 I think it's cool as a cucumber that we can choose fully open-source RISC-V if we want. My guess is the RV cores are slower clock-per-clock than the M33 cores; that is benchmark scores…
    comment by GeorgeTirebiter · 2024-08-08 · in I got almost all of my wishes granted with RP2350
  14. …Also exciting to see them dip their toe into the open silicon waters with the hazard 3 RISCV core https://github.com/Wren6991/Hazard3 . Of course it they'd used Ibex https://github.com/lowrisc/ibex the RISC-V core we develop and maintain…
  15. …Cortex-M33 cores (4.09 CoreMark/MHz) and two open-source RISC-V Hazard3 cores (3.81 CoreMark/MHz): https://github.com/Wren6991/Hazard3
  16. Hazard3 RTL: https://github.com/Wren6991/Hazard3