TheThirdOne/rars
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RARS -- RISC-V Assembler and Runtime Simulator
11 mentions on Hacker News by 2 people: 3 stories, 8 comments · first 2019-03-21 · latest 2025-10-28
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if you're looking for an nice RISCV emulator try RARS https://github.com/TheThirdOne/rars
comment by bigprovolone · 2025-10-28 · in Easy RISC-V -
…the software and you want to try learning risc-v assembly, I would recommend the simulator I made https://github.com/TheThirdOne/rars .
comment by thethirdone · 2023-01-01 · in Ripes: Visual computer architecture simulator, assembly code editor for RISC-V -
…about making a simulator, but its a little too much effort to do for a drive-by comment. [0]: https://github.com/TheThirdOne/rars [1]: https://github.com/riscv/riscv-isa-manual/releases/download/... [2]:…
comment by thethirdone · 2020-08-24 · in Implement an emulator for a fantasy CPU in JavaScript -
…program into user code unless you make a custom entry point. Source: I am the maintainer of RARS ( https://github.com/TheThirdOne/rars )
comment by thethirdone · 2020-04-30 · in Writing a RISC-V Emulator from Scratch -
…[4]. I am not sure how many would support any kind of machine mode memory mapping though. [0]: https://github.com/TheThirdOne/rars [1]: https://github.com/riscv/riscv-teach [2]: https://venus.cs61c.org/ [3]:…
comment by thethirdone · 2020-01-02 · in RISC-V Stumbling Blocks -
…(original project) [4]: https://github.com/ThaumicMekanism/venus (currently maintained fork) [5]: https://github.com/TheThirdOne/rars [6]: https://github.com/mortbopet/Ripes [7]: https://riscv.org/software-status/
comment by thethirdone · 2019-08-04 · in Jupiter: RISC-V Assembler and Runtime Simulator -
…startup time? I'll look into what it would take to make a easily configurable launch class. [0]: https://github.com/TheThirdOne/rars/issues
comment by thethirdone · 2019-03-22 · in Show HN: IDE for Learning RISC-V -
…I can't expect you to be an expert and these are very reasonable questions. Thanks for asking. [0]: https://github.com/TheThirdOne/rars/tree/master/rars/riscv/s... [1]: https://github.com/riscv/riscv-isa-sim
comment by thethirdone · 2019-03-22 · in Show HN: IDE for Learning RISC-V